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cpu/stm32/periph/adc: fix setting ADC clock #19629

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May 28, 2023
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4 changes: 2 additions & 2 deletions cpu/stm32/periph/adc_f1.c
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@
/**
* @brief Maximum allowed ADC clock speed
*/
#define MAX_ADC_SPEED (14000000U)
#define MAX_ADC_SPEED MHZ(14)

/**
* @brief Allocate locks for all three available ADC devices
Expand Down Expand Up @@ -93,7 +93,7 @@ int adc_init(adc_t line)
}
/* set clock prescaler to get the maximal possible ADC clock value */
for (clk_div = 2; clk_div < 8; clk_div += 2) {
if ((CLOCK_CORECLOCK / clk_div) <= MAX_ADC_SPEED) {
if ((periph_apb_clk(APB2) / clk_div) <= MAX_ADC_SPEED) {
break;
}
}
Expand Down
4 changes: 2 additions & 2 deletions cpu/stm32/periph/adc_f2.c
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@
/**
* @brief Maximum allowed ADC clock speed
*/
#define MAX_ADC_SPEED (12000000U)
#define MAX_ADC_SPEED MHZ(12)

/**
* @brief Default VBAT undefined value
Expand Down Expand Up @@ -86,7 +86,7 @@ int adc_init(adc_t line)
}
/* set clock prescaler to get the maximal possible ADC clock value */
for (clk_div = 2; clk_div < 8; clk_div += 2) {
if ((CLOCK_CORECLOCK / clk_div) <= MAX_ADC_SPEED) {
if ((periph_apb_clk(APB2) / clk_div) <= MAX_ADC_SPEED) {
break;
}
}
Expand Down
4 changes: 2 additions & 2 deletions cpu/stm32/periph/adc_f4_f7.c
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@
/**
* @brief Maximum allowed ADC clock speed
*/
#define MAX_ADC_SPEED (12000000U)
#define MAX_ADC_SPEED MHZ(12)

/**
* @brief Maximum sampling time for each channel (480 cycles)
Expand Down Expand Up @@ -94,7 +94,7 @@ int adc_init(adc_t line)
dev(line)->CR2 = ADC_CR2_ADON;
/* set clock prescaler to get the maximal possible ADC clock value */
for (clk_div = 2; clk_div < 8; clk_div += 2) {
if ((CLOCK_CORECLOCK / clk_div) <= MAX_ADC_SPEED) {
if ((periph_apb_clk(APB2) / clk_div) <= MAX_ADC_SPEED) {
break;
}
}
Expand Down