From f41e308ad2dcb88cf46b49154d4a3fbb961787fa Mon Sep 17 00:00:00 2001
From: Vivek Thampi <vivek.mt@gmail.com>
Date: Tue, 2 Jul 2013 21:51:43 -0700
Subject: [PATCH] A few more avx instructions

---
 .gitignore           |  2 +-
 docs/x86/optable.xml | 26 ++++++++++++++++----------
 2 files changed, 17 insertions(+), 11 deletions(-)

diff --git a/.gitignore b/.gitignore
index 61c9eb0..b677c9c 100644
--- a/.gitignore
+++ b/.gitignore
@@ -32,7 +32,7 @@ tests/_results/
 tests/*.bin
 tests/*.out
 tests/difftest.sh
-scripts/ud_asmtest*
+scripts/ud_*asmtest*
 
 # Ignore C++ Builder history folders
 libudis86/__history/
diff --git a/docs/x86/optable.xml b/docs/x86/optable.xml
index ec8f156..01b4a29 100644
--- a/docs/x86/optable.xml
+++ b/docs/x86/optable.xml
@@ -729,18 +729,20 @@
     <instruction>
         <mnemonic>cmppd</mnemonic>
         <def>
-            <pfx>aso rexr rexx rexb</pfx>
+            <pfx>aso rexr rexx rexb vexl</pfx>
             <opc>/sse=66 0f c2</opc>
-            <opr>V W Ib</opr>
+            <opr>V H W Ib</opr>
+            <cpuid>sse2 avx</cpuid>
         </def>
     </instruction>
 
     <instruction>
         <mnemonic>cmpps</mnemonic>
         <def>
-            <pfx>aso rexr rexx rexb</pfx>
+            <pfx>aso rexr rexx rexb vexl</pfx>
             <opc>0f c2</opc>
-            <opr>V W Ib</opr>
+            <opr>V H W Ib</opr>
+            <cpuid>sse2 avx</cpuid>
         </def>
     </instruction>
 
@@ -767,9 +769,10 @@
             <opc>a7 /o=32</opc>
         </def>
         <def>
-            <pfx>aso rexr rexx rexb</pfx>
+            <pfx>aso rexr rexx rexb vexl</pfx>
             <opc>/sse=f2 0f c2</opc>
-            <opr>V W Ib</opr>
+            <opr>V H W Ib</opr>
+            <cpuid>sse2 avx</cpuid>
         </def>
     </instruction>
 
@@ -784,9 +787,10 @@
     <instruction>
         <mnemonic>cmpss</mnemonic>
         <def>
-            <pfx>aso rexr rexx rexb</pfx>
+            <pfx>aso rexr rexx rexb vexl</pfx>
             <opc>/sse=f3 0f c2</opc>
-            <opr>V W Ib</opr>
+            <opr>V H W Ib</opr>
+            <cpuid>sse2 avx</cpuid>
         </def>
     </instruction>
 
@@ -833,6 +837,7 @@
             <pfx>aso rexr rexx rexb</pfx>
             <opc>/sse=66 0f 2f</opc>
             <opr>V W</opr>
+            <cpuid>sse2 avx</cpuid>
         </def>
     </instruction>
 
@@ -842,6 +847,7 @@
             <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 2f</opc>
             <opr>V W</opr>
+            <cpuid>sse2 avx</cpuid>
         </def>
     </instruction>
 
@@ -8949,7 +8955,7 @@
     <instruction>
         <mnemonic>blendvpd</mnemonic>
         <def>
-            <pfx>aso rexr rexx rexb</pfx>
+            <pfx>aso rexr rexx rexb vexl</pfx>
             <opc>/sse=66 0f 38 15 /vexw=0</opc>
             <opr>V H W L</opr>
             <cpuid>sse4.1 avx</cpuid>
@@ -8959,7 +8965,7 @@
     <instruction>
         <mnemonic>blendvps</mnemonic>
         <def>
-            <pfx>aso rexr rexx rexb</pfx>
+            <pfx>aso rexr rexx rexb vexl</pfx>
             <opc>/sse=66 0f 38 14 /vexw=0</opc>
             <opr>V H W L</opr>
             <cpuid>sse4.1 avx</cpuid>