Nand2Tetris: Build a computer system from the ground up, from nand to tetris. Hardware and software.

Materials for the Computer Science course, Digital Design (Logic Circuits)

A 32-bit ALU using combinational logic written in Verilog.

An efficient combinatorics library for JavaScript to generate and get the list of all Permutations and Combinations with the ability to enable or disable repetition. (utilizing ES2015 generators)

This is a Combinational Circuit Logic Simulation Tool. There is a C++ version and a C version.

Design of the implementation of a calculator connected on the integrated FPGA

Source code for various Verilog-based projects and assignments

VHDL implementations of half-adders, full-adders, and a 4-bit adder for digital circuit design

Codes written by me in my Digital Logic Design course.

This script lists out all paths from inputs to outputs of an input combinational circuit in the form of structural/gate-level modelling in verilog. The BFS graph algorithm is used.

This repository contains synthesizable VHDL code for basic combinational logic circuits such as Adder with register, 2:4 decoder, 4:2 priority encoder, Multiplier with register and other circuits.

MUX VHDL | Układ kombinacyjny VHDL

These are the assignments of Second year Analog Digital Electronicd subject

VHDL projects for combinational and sequential logic design on FPGA.

simulation of essential combinational logic circuits with boolean algebra

Analyze the combine with and without the repetition. (SOON)

EE89H Final Project

4 bit Calculator using Logic Gates

This repository contains the project files and report for an ASCII letter to Morse Code converter built using only basic sequential and combinational logic circuits.