diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_TCP_Echo_Qemu_mps2/startup.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_TCP_Echo_Qemu_mps2/startup.c index fc9e2547880..f1495d6e6a7 100644 --- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_TCP_Echo_Qemu_mps2/startup.c +++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_TCP_Echo_Qemu_mps2/startup.c @@ -111,15 +111,14 @@ void Default_Handler( void ) { __asm volatile ( - "Default_Handler: \n" - " ldr r3, NVIC_INT_CTRL_CONST \n" + "Default_Handler:\n" + " ldr r3, =0xe000ed04\n" " ldr r2, [r3, #0]\n" " uxtb r2, r2\n" "Infinite_Loop:\n" " b Infinite_Loop\n" ".size Default_Handler, .-Default_Handler\n" - ".align 4\n" - "NVIC_INT_CTRL_CONST: .word 0xe000ed04\n" + ".ltorg\n" ); } @@ -135,6 +134,7 @@ void Default_Handler2( void ) " ldr r1, [r0, #24] \n" " ldr r2, =prvGetRegistersFromStack \n" " bx r2 \n" + " .ltorg \n" ); } @@ -219,6 +219,7 @@ __attribute__( ( naked ) ) void exit( int status ) "movs r0, #0x18\n" /* SYS_EXIT */ "bkpt 0xab\n" "end: b end\n" + ".ltorg" ); ( void ) status; diff --git a/FreeRTOS/Demo/CORTEX_MPS2_QEMU_IAR_GCC/build/gcc/startup_gcc.c b/FreeRTOS/Demo/CORTEX_MPS2_QEMU_IAR_GCC/build/gcc/startup_gcc.c index 5ce6d6c790c..2d1abbf064b 100644 --- a/FreeRTOS/Demo/CORTEX_MPS2_QEMU_IAR_GCC/build/gcc/startup_gcc.c +++ b/FreeRTOS/Demo/CORTEX_MPS2_QEMU_IAR_GCC/build/gcc/startup_gcc.c @@ -122,13 +122,12 @@ void Default_Handler( void ) __asm volatile ( ".align 8 \n" - " ldr r3, NVIC_INT_CTRL_CONST \n" /* Load the address of the interrupt control register into r3. */ + " ldr r3, =0xe000ed04 \n" /* Load the address of the interrupt control register into r3. */ " ldr r2, [r3, #0] \n" /* Load the value of the interrupt control register into r2. */ " uxtb r2, r2 \n" /* The interrupt number is in the least significant byte - clear all other bits. */ "Infinite_Loop: \n" /* Sit in an infinite loop - the number of the executing interrupt is held in r2. */ " b Infinite_Loop \n" - ".align 4 \n" - "NVIC_INT_CTRL_CONST: .word 0xe000ed04 \n" + " .ltorg \n" ); } @@ -144,6 +143,7 @@ void HardFault_Handler( void ) " ldr r1, [r0, #24] \n" " ldr r2, =prvGetRegistersFromStack \n" " bx r2 \n" + " .ltorg \n" ); } diff --git a/FreeRTOS/Demo/CORTEX_MPU_M3_MPS2_QEMU_GCC/init/startup.c b/FreeRTOS/Demo/CORTEX_MPU_M3_MPS2_QEMU_GCC/init/startup.c index 0a49d0f62bc..b5b1a45cd08 100644 --- a/FreeRTOS/Demo/CORTEX_MPU_M3_MPS2_QEMU_GCC/init/startup.c +++ b/FreeRTOS/Demo/CORTEX_MPU_M3_MPS2_QEMU_GCC/init/startup.c @@ -112,15 +112,14 @@ void Default_Handler( void ) { __asm volatile ( - "Default_Handler: \n" - " ldr r3, NVIC_INT_CTRL_CONST \n" + "Default_Handler:\n" + " ldr r3, =0xe000ed04\n" " ldr r2, [r3, #0]\n" " uxtb r2, r2\n" "Infinite_Loop:\n" " b Infinite_Loop\n" ".size Default_Handler, .-Default_Handler\n" - ".align 4\n" - "NVIC_INT_CTRL_CONST: .word 0xe000ed04\n" + ".ltorg\n" ); } @@ -136,6 +135,7 @@ void HardFault_Handler( void ) " ldr r1, [r0, #24] \n" " ldr r2, =prvGetRegistersFromStack \n" " bx r2 \n" + " .ltorg \n" ); } @@ -150,6 +150,7 @@ void MemMang_Handler( void ) " mrsne r0, psp \n" " ldr r1, =vHandleMemoryFault \n" " bx r1 \n" + " .ltorg \n" ); } @@ -163,6 +164,7 @@ void BusFault_Handler( void ) " mrsne r0, psp \n" " ldr r1, =vHandleMemoryFault \n" " bx r1 \n" + " .ltorg \n" ); } @@ -176,6 +178,7 @@ void UsageFault_Handler( void ) " mrsne r0, psp \n" " ldr r1, =vHandleMemoryFault \n" " bx r1 \n" + " .ltorg \n" ); } @@ -189,6 +192,7 @@ void Debug_Handler( void ) " mrsne r0, psp \n" " ldr r1, =vHandleMemoryFault \n" " bx r1 \n" + " .ltorg \n" ); } @@ -246,6 +250,7 @@ void exit( int status ) "movs r0, #0x18\n" /* SYS_EXIT */ "bkpt 0xab\n" "end: b end\n" + ".ltorg\n" ); ( void ) status;