Skip to content
View mvkvc's full-sized avatar
  • Toronto
  • 11:56 (UTC -04:00)

Block or report mvkvc

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
Showing results
Python 67 3 Updated Oct 27, 2024

Getting the most out of your hobby servo

Python 470 41 Updated Apr 1, 2024

Elixir Library for generating models in OpenSCAD

Elixir 1 1 Updated Nov 27, 2023

High performance AI inference stack. Built for production. @ziglang / @openxla / MLIR / @bazelbuild

Zig 1,619 57 Updated Oct 29, 2024

Implementing the 4 agentic patterns from scratch

Jupyter Notebook 687 59 Updated Oct 25, 2024

Whereabouts Ascertainment for Low-lying Detectable Objects. The SOTA in FOSS AI for drones!

Python 751 77 Updated Oct 9, 2024

MLIR For Beginners tutorial

C++ 804 66 Updated Sep 30, 2024

LLaMA-Omni is a low-latency and high-quality end-to-end speech interaction model built upon Llama-3.1-8B-Instruct, aiming to achieve speech capabilities at the GPT-4o level.

Python 2,504 167 Updated Sep 24, 2024
Verilog 2 1 Updated Sep 14, 2024

MLIR Toolkit in Elixir and Zig.

Elixir 162 8 Updated Oct 27, 2024

INT4/INT5/INT8 and FP16 inference on CPU for RWKV language model

C++ 1,418 98 Updated Aug 7, 2024

Berkeley's Spatial Array Generator

Scala 806 167 Updated Oct 20, 2024

Open source machine learning accelerators

Scala 357 29 Updated Mar 24, 2024

Metadata driven Databricks Delta Live Tables framework for bronze/silver pipelines

Python 153 68 Updated Oct 31, 2024

The Clay Foundation Model (in development)

Python 361 46 Updated Oct 31, 2024

Tiny matrix multiplication ASIC with 4-bit math

Verilog 7 4 Updated Apr 19, 2024

Want a faster ML processor? Do it yourself! -- A framework for playing with custom opcodes to accelerate TensorFlow Lite for Microcontrollers (TFLM). . . . . . Online tutorial: https://google.githu…

Verilog 468 119 Updated Nov 1, 2024

A guide on how to package HDL code (VHDL or Verilog) for PYNQ environments

8 Updated May 4, 2023

A template project for beginning new Chisel work

Scala 583 185 Updated May 26, 2024

Submission template for Tiny Tapeout 9 - Verilog HDL Projects

Verilog 7 88 Updated Oct 22, 2024

Generator Bootcamp Material: Learn Chisel the Right Way

Jupyter Notebook 975 277 Updated Sep 10, 2024

Chisel: A Modern Hardware Design Language

Scala 3,972 595 Updated Oct 29, 2024

Dataflow compiler for QNN inference on FPGAs

Python 742 237 Updated Nov 1, 2024

Dataflow QNN inference accelerator examples on FPGAs

Python 180 58 Updated Oct 31, 2024

The Nerves Community Fleet for Code BEAM Berlin 2024

Elixir 21 4 Updated Oct 14, 2024

Static Site Generator

Elixir 158 9 Updated Oct 13, 2024

Install and Test of Yolov8 on Raspberry Pi5 with USB Coral TPU

Shell 7 2 Updated May 27, 2024

Tiny status page generated by a Python script

Python 1,116 60 Updated Oct 31, 2024

Examples of using the Membrane Framework

Elixir 208 29 Updated Oct 22, 2024

Open source implementation of AlphaFold3

Python 850 64 Updated Oct 7, 2024
Next